Semiconductor device manufacturing method

ABSTRACT

There are provided the steps of exposing a surface of a copper (Cu) wiring layer formed over a semiconductor substrate to a plasma of a gas selected from the group consisting of an ammonia gas, a mixed gas of nitrogen and hydrogen, a CF 4  gas, a C 2 F 6  gas and a NF 3  gas, exposing the surface of the copper (Cu) wiring layer to an atmosphere or a plasma of a gas selected from the group consisting of an ammonia gas, an ethylenediamine gas, a β-diketone gas, a mixed gas consisting of the ammonia gas and a hydrocarbon gas (C x H y ), and a mixed gas consisting of a nitrogen gas and the hydrocarbon gas (C x H y ), and forming a Cu diffusion preventing insulating film on the copper (Cu) wiring layer.

BACKGROUND OF THE INVENTION

[0001] a) Field of the Invention

[0002] The present invention relates to a semiconductor devicemanufacturing method and, more particularly, the technology ofpreventing diffusion of Cu in a copper (Cu) wiring layer in connectionwith the multi-layered wiring technology.

[0003] b) Description of the Prior Art

[0004] The LSI is manufactured by connecting the transistors, thediodes, the capacitors, the resistors, etc. arranged electricallyseparately on the semiconductor substrate via wirings.

[0005] The technology for connecting the elements at the high density isthe multi-layered wiring technology, and this multi-layered wiringtechnology is the important technology for deciding the higherperformance of LSI. The parasitic effects of the resistances, thecapacitances, etc. in the multi-layered wiring have the large influenceon the circuit performance of LSI. In light of such viewpoint, themulti-layered wiring in which the Cu (copper) wiring, which has the lowresistance, and the interlayer insulating film, which is made of thematerial having the low dielectric constant, are used in combination isnow employed. As this manufacturing method, the burying process, i.e.,so-called damascene process, is now employed.

[0006] The Cu wiring layer has the characteristic such that Cu in the Cuwiring layer is ready to diffuse into the interlayer insulating film inthe step in which the annealing is applied, or the like. If the Cu inthe Cu wiring layer diffuses into the interlayer insulating film,disadvantages such that the leakage current in the interlayer insulatingfilm is increased are brought about. For this reason, the diffusion ofCu in the Cu wiring layer is prevented by forming the Cu diffusionpreventing insulating film such as the silicon nitride film, which hasthe Cu diffusion preventing function, between the Cu wiring layer andthe interlayer insulating film.

[0007] However, the dielectric constant (e.g., ∈=5 or so) of theinsulating film that can prevent the diffusion of Cu is considerablyhigher than that (e.g., ∈=2.8 or so) of the insulating film that has thelow dielectric constant. Therefore, even if the major part of theinterlayer insulating film is formed by the insulating film having thelow dielectric constant, the parasitic capacitance between the Cu wiringlayers in the multi-layered wiring is increased effectively because ofthe intervention of the Cu diffusion preventing insulating film. Forinstance, in the situation that a total film thickness of the interlayerinsulating film is fixed to 500 nm, if 100 nm is assigned to a thicknessof the Cu diffusion preventing insulating film (∈=5 or so) and aremaining thickness is assigned to the insulating film having the lowdielectric constant (∈=2.8 or so), an effective dielectric constant ofthe interlayer insulating film is increased up to about 3.05. As aresult, the delay in the electric signal that is propagated in thewiring of the multi-layered wiring in LSI, i.e., the wiring delay isincreased, and it is possible that this delay causes the fatal problem.

[0008] Therefore, it is studied that the film thickness of the Cudiffusion preventing insulating film is reduced. However, because of theinfluence of the step of forming the Cu diffusion preventing insulatingfilm on the Cu wiring layer by the plasma CVD method, the later step ofexecuting the annealing at about 400 to 450° C., etc., Cu projectionsare readily generated from the surface layer portion of the Cu wiringlayer. Thus, there is the problem that the Cu is diffused from thisprojection portion.

[0009] Further, in the prior art, it is difficult to use the insulatingfilm having the low dielectric constant as the Cu diffusion preventinginsulating film that can prevent the diffusion of Cu. As a result, amethod of forming an insulating film that has the low dielectricconstant and is able to prevent the diffusion of Cu is desiredearnestly.

SUMMARY OF THE INVENTION

[0010] It is an object of the present invention to provide asemiconductor device manufacturing method capable of reducing acapacitance between wiring layers of the multi-layered wiring bypreventing the generation of projections of a Cu wiring layer to reducea film thickness of a Cu diffusion preventing insulating film and bymaking it possible to use an insulating film, a dielectric constant ofwhich is low, as the Cu diffusion preventing insulating film.

[0011] The present invention provides a semiconductor devicemanufacturing method which comprises the steps of forming asilicon-containing insulating film on a wiring layer made mainly of acopper (Cu) formed over a semiconductor substrate; and exposing thesilicon-containing insulating film an atmosphere or a plasma of ahydrocarbon (C_(x)H_(y)) gas.

[0012] Therefore, a carbon-containing layer can be formed on the surfacelayer of the silicon-containing insulating film. The carbon-containinglayer has the etching resistance against the gaseous or liquid etchantfor the silicon-containing insulating film. As a result, not only thebarrier function against the copper particles of the copper wiring layerbut also the etching stopper function used when the thick interlayerinsulating film formed on the barrier insulating film is etched can beprovided to the silicon-containing insulating film by the simpleprocess.

[0013] Also, the present invention provides a semiconductor devicemanufacturing method which comprises the steps of exposing a surface ofa copper (Cu) wiring layer formed over a semiconductor substrate to aplasma of a gas selected from the group consisting of an ammonia gas, amixed gas of nitrogen and hydrogen, a CF₄ gas, a C₂F₆ gas and a NF₃ gas;exposing the surface of the copper (Cu) wiring layer to an atmosphere ora plasma of a gas selected from the group consisting of an ammonia gas,an ethylenediamine gas, a β-diketone gas, a mixed gas consisting of theammonia gas and a hydrocarbon gas (C_(x)H_(y)), and a mixed gasconsisting of a nitrogen gas and the hydrocarbon gas (C_(x)H_(y)); andforming a Cu diffusion preventing insulating film on the copper (Cu)wiring layer.

[0014] According to the present invention, the natural oxide film on thesurface of the Cu wiring layer is removed by exposing the surface of theCu wiring layer, which is subjected to the annealing process, to theplasma of the ammonia gas, etc., for example, in the nonoxidizing gasatmosphere.

[0015] Then, the Cu wiring layer from the surface of which the naturaloxide film is removed is exposed to the atmosphere or the plasma of thegas selected from the group consisting of the ammonia gas, theethylenediamine gas, the β-diketone gas, the mixed gas consisting of theammonia gas and the hydrocarbon gas (C_(x)H_(y)), and the mixed gasconsisting of the nitrogen gas and the hydrocarbon gas (C_(x)H_(y)).

[0016] If the surface of the Cu wiring layer is processed by theatmosphere or the plasma of the gas in the situation that the naturaloxide film on the surface of the Cu wiring layer is removed in advance,a compound layer (or a bonding layer) in which the element such as N, H,C, or the like contained in these gases is combined with or bonded to Cuis formed on the surface layer portion of the Cu wiring layer. If theethylenediamine gas, the β-diketone gas, the gas of the compound that issimilar to them, or the like is employed, the complex is formed on thesurface layer portion of the Cu wiring layer.

[0017] Then, the Cu diffusion preventing insulating film is formed onthe Cu wiring layer that is subjected to the surface treatment. At thistime, since the above compound layer is formed on the surface layerportion of the Cu wiring layer, the generation of projections from thesurface layer portion of the Cu wiring layer in the step of forming theCu diffusion preventing insulating film or the step of applying theannealing process later can be suppressed. Accordingly, even if a filmthickness of the Cu diffusion preventing insulating film is reduced, thediffusion of Cu can be prevented.

[0018] In addition, the surface layer portion (compound layer) of the Cuwiring layer can also function as the Cu diffusion preventing film.Therefore, even if the insulating film whose dielectric constant is lowbut whose Cu diffusion preventing capability is not high is employed asthe Cu diffusion preventing insulating film, the diffusion of Cu can beprevented.

[0019] As a result, since the increase in the capacitance between the Cuwiring layers can be prevented, the multi-layered wiring for thehigh-performance LSI having the small wiring delay can be manufactured.

[0020] Also, the present invention provides a semiconductor devicemanufacturing method which comprises the steps of exposing a surface ofa copper (Cu) wiring layer formed over a semiconductor substrate to aplasma of an ammonia gas; forming a silicon-containing insulating filmon the copper (Cu) wiring layer; and exposing the silicon-containinginsulating film to an atmosphere or a plasma selected from the groupconsisting of an atmosphere or a plasma of a mixed gas consisting of anammonia gas and a hydrocarbon gas (C_(x)H_(y)), an atmosphere or aplasma of a mixed gas consisting of a nitrogen gas and the hydrocarbongas (C_(x)H_(y)), a plasma of the nitrogen gas, and an atmosphere of theammonia gas.

[0021] According to the present invention, first the natural oxide filmon the surface of the Cu wiring layer is removed by exposing the surfaceof the Cu wiring layer to the plasma of the ammonia gas.

[0022] Then, the silicon-containing insulating film is formed on this Cuwiring layer. At this time, in order to reduce the parasitic capacitancearound the Cu wiring, for example, the silicon-containing insulatingfilm whose dielectric constant is relatively low is formed. In thiscase, the silicon-containing insulating film is still the insulatingfilm whose Cu diffusion preventing capability is not high at this pointof time.

[0023] Then, this Cu diffusion preventing insulating film is exposed tothe atmosphere or the plasma of the above gas, for example, the mixedgas consisting of the ammonia gas and the hydrocarbon (C_(x)H_(y)) gas.

[0024] In this step, the process may be carried out by two followingsteps. More particularly, first the silicon-containing insulating filmmay be exposed to either the atmosphere or the plasma of the ammonia gasor the plasma of the nitrogen gas, and then such film may be exposed tothe plasma of the C_(x)H_(y) gas. Otherwise, in the opposite sequence tothe above two steps, first the silicon-containing insulating film may beexposed to the plasma of the hydrocarbon (C_(x)H_(y)) gas, and then suchfilm may be exposed to either the atmosphere or the plasma of theammonia gas or the plasma of the nitrogen gas.

[0025] In this manner, the film quality of the silicon-containinginsulating film can be changed into the insulating film having the highCu diffusion preventing capability by exposing the silicon-containinginsulating film, whose dielectric constant is low but whose Cu diffusionpreventing capability is not high, to the atmosphere or the plasma ofthe above gas. Accordingly, the insulating film whose dielectricconstant is low can be employed as the Cu diffusion preventinginsulating film that can prevent the diffusion of Cu. Therefore, sincenot only the diffusion of Cu in the Cu wiring layer can be prevented butalso the increase in the parasitic capacitance around the Cu wiringlayer can be prevented, the multi-layered wiring for thehigh-performance LSI having the small wiring delay can be manufactured.

[0026] In addition, since the natural oxide film on the surface layerportion of the Cu wiring layer is removed by the plasma of the ammoniagas and then the silicon-containing insulating film is formed on the Cuwiring layer, the adhesiveness between the Cu wiring layer and thesilicon-containing insulating film can be improved. Therefore, thereliability of the multi-layered wiring can be improved.

BRIEF DESCRIPTION OF THE DRAWINGS

[0027] FIG.1 is a schematic sectional view showing the plasma CVDequipment employed in the semiconductor device manufacturing methodaccording to embodiments of the present invention;

[0028]FIGS.2A and 2B are schematic sectional views showing asemiconductor device manufacturing method according to a firstembodiment of the present invention;

[0029]FIG. 3 is a graph showing a current (I)-voltage (V) characteristicof a reference sample prior to the annealing;

[0030]FIG. 4 is a graph showing a current (I)-voltage (V) characteristicof the reference sample after the annealing;

[0031]FIG. 5 is a graph showing a current (I)-voltage (V) characteristicof a test sample (processed by an NH₃+C₇H₁₄ gas plasma) according to thefirst embodiment of the present invention prior to the annealing;

[0032]FIG. 6 is a graph showing a current (I)-voltage (V) characteristicof the test sample (processed by the NH₃+C₇H₁₄ gas plasma) according tothe first embodiment of the present invention after the annealing;

[0033]FIGS. 7A and 7B are schematic sectional views showing asemiconductor device manufacturing method according to a secondembodiment of the present invention;

[0034]FIG. 8 is a graph showing a current (I)-voltage (V) characteristicof a test sample 1A (processed in an NH₃ gas atmosphere) according tothe second embodiment of the present invention prior to the annealing;

[0035]FIG. 9 is a graph showing a current (I)-voltage (V) characteristicof the test sample 1A (processed in the NH₃ gas atmosphere) according tothe second embodiment of the present invention after the annealing;

[0036]FIG. 10 is a graph showing a current (I)-voltage (V)characteristic of a test sample 2A (NH₃+CH₄ gas plasma process)according to the second embodiment of the present invention prior to theannealing;

[0037]FIG. 11 is a graph showing a current (I)-voltage (V)characteristic of the test sample 2A (NH₃+CH₄ gas plasma process)according to the second embodiment of the present invention after theannealing; and

[0038]FIGS. 12A to 12E are sectional views showing a semiconductordevice manufacturing method according to a third embodiment of thepresent invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0039] Embodiments of the present invention will be explained withreference to the accompanying drawings hereinafter.

[0040] (Explanation of the Semiconductor Manufacturing EquipmentEmployed in the Semiconductor Device Manufacturing Method According toEmbodiments)

[0041]FIG. 1 is a schematic sectional view showing the plasma CVDequipment employed in the embodiments of the present invention.

[0042] The semiconductor manufacturing equipment employed in thesemiconductor device manufacturing method according to embodiments isthe plasma CVD (Chemical Vapor Deposition) equipment 15. As shown inFIG. 1, this equipment 15 comprises basically a chamber 10 in which thefilm formation and the plasma process are applied onto a semiconductorsubstrate, a gas supply system 11 for supplying the gases to the chamber10, and a gas exhaust system 13 for reducing the pressure in the chamber10. Two electrodes, i.e., a lower electrode 18 and an upper electrode 12are provided in the chamber 10. A heater 22 for heating a semiconductorsubstrate 14 is arranged under the lower electrode 18. Also, acylindrical susceptor 16 on which the semiconductor substrate 14 isloaded is arranged on an upper portion and a side portion of the lowerelectrode 18.

[0043] A high-frequency power supply 20 of 380 kHz as LF (Low Frequency)is connected to the lower electrode 18, while a high-frequency powersupply 26 of 13.56 MHz as RF (Radio Frequency) is connected to the upperelectrode 12. If the high-frequency power is supplied to the gas in thechamber 10 by using any one or both of these high-frequency powersupplies 20, 26, the gas can be plasmanized.

[0044] The upper electrode 12 is also used as the shower head to supplythe gas into the chamber 10. A gas supply pipe 17 is connected to thisshower head. A HMDSO ((Si(CH₃)₃)₂O) gas line 28, a CH₄ or C₂H₂ gas line30, an NH₃ gas line 32, an N₂O gas line 34, an NF₃ gas line 36, and anN₂ gas line 38 are connected to the gas supply pipe 17. Then, a massflowmeter 37 and gas supply valves 39, 39 a are provided in these gas lines28, 30, 32, 34, 36, 38 respectively.

[0045] The N₂ gas line 38 is connected to the massflow meter 37 and thegas supply valve 39 provided in the remaining gas lines 28, 30, 32, 34,36 via a gas valve respectively. Accordingly, the N₂ gas can be suppliedto the remaining gas lines 28, 30, 32, 34, 36 as the purge gas.

[0046] The above gas lines are shown merely as an example. It is ofcourse that such gas lines can be appropriately varied to supply adesired gas.

[0047] An exhaust valve 23 and an exhaust pump 24 are provided in thegas exhaust system 13 connected to the chamber 10.

[0048] The plasma CVD equipment 15 employed in the present embodiment isconstructed in this manner. First, while reducing the pressure in thechamber 10 by the gas exhaust system 13, the predetermined gas issupplied from the gas supply pipe 17 to the chamber 10 to set the insideof the chamber 10 at a predetermined pressure. Then, the gas isplasmanized by applying the high-frequency voltage to the lowerelectrode 18 and the upper electrode 12. Because the gas is plasmanizedin this manner, the film formation of various films and the plasmaprocess can be applied to the semiconductor substrate. Also, it is ofcourse that the semiconductor substrate can be processed in the gasatmosphere not to plasmanize the gas.

[0049] (Semiconductor Device Manufacturing Method of the PresentEmbodiments)

[0050] 1. First Embodiment

[0051]FIGS. 2A and 2B are schematic sectional views showing asemiconductor device manufacturing method according to a firstembodiment of the present invention.

[0052] In the semiconductor device manufacturing method according to thefirst embodiment of the present invention, first a semiconductorsubstrate 40 shown in FIG. 2A is prepared. That is, predeterminedsemiconductor elements (not shown) are formed on the semiconductorsubstrate 40, and Cu (copper) wiring layers 44 each buried in a wiringrecess 42a in an insulating film 42 are formed over the semiconductorsubstrate 40 such that the semiconductor elements are connectedelectrically to the Cu wiring layers 44.

[0053] The Cu wiring layer 44 is buried in the wiring recess 42 a via abarrier metal layer 44 a made of a TiN layer, a TaN layer, or the like,for example. The barrier metal layer 44 a and the Cu wiring layer 44 areburied in the wiring recess 42 a by removing the films, which are formedin the wiring recess 42 a and on the insulating film 42, from thesurface by virtue of the chemical mechanical polishing (CMP) method.After the film of the Cu wiring layer 44 is formed or the Cu wiringlayer 44 is buried by the CMP method, the annealing process is appliedto this Cu wiring layer 44 in the nonoxidizing gas (e.g., hydrogen gas)atmosphere.

[0054] Then, the semiconductor substrate 40 is carried into the chamber10 of the above plasma CVD equipment 15. Then, a surface of the Cuwiring layer 44 on the semiconductor substrate 40 is exposed to theplasma of the NH₃ (ammonia) gas, the plasma of the mixed gas consistingof N₂ (nitrogen) and H₂ (hydrogen), the plasma of the CF₄ gas, theplasma of the C₂F₆ gas, or the plasma of the NF₃ gas. The natural oxidefilm formed on a surface layer portion of the Cu wiring layer 44 isremoved by this step.

[0055] Then, the surface of the Cu wiring layer 44 is exposed to theatmosphere or the plasma of the gas containing the NH₃ (ammonia) gas,the C_(x)H_(y) gas (hydrocarbon gas), or the like, for example, in thesame chamber 10 or another chamber of the same equipment. Accordingly,as shown in FIG. 2B, a compound layer (or a bonding layer) 44 b isformed on the surface layer portion of the Cu wiring layer 44 becausethe element such as N, H, C, or the like in the above gas is combinedwith or bonded to Cu in the surface layer portion of the Cu wiring layer44.

[0056] As a particular example of the gas employed in this step, thereis the NH₃ (ammonia) gas, an ethylenediamine gas, a β-diketone gas, amixed gas of the NH₃ (ammonia) gas and the C_(x)H_(y) gas (hydrocarbongas), a mixed gas of the N₂ (nitrogen) and the C_(x)H_(y) gas(hydrocarbon gas), or the like. In this case, as the C_(x)H_(y) gas, anyone of CH₄ (methane), C₂H₂ (acetylene), C₂H₄ (ethylene), C₃H₈ (propane),C₄H₈ (butylene), C₄H₁₀ (butane), C₆H₆ (benzene), C₆H₁₂ (cyclohexane) andC₇H₁₄ (methylcyclohexane) may be employed.

[0057] If the ethylenediamine gas, the β-diketone gas, the gas of thecompound that is similar to them, or the like among these gases isemployed, the complex is formed on the surface layer portion of the Cuwiring layer 44. As an example of the β-diketone gas,hexafluoroacetylacetone (C₅H₂O₂F₆) may be employed.

[0058] Then, a Cu diffusion preventing insulating film 46 made of asilicon nitride film, or the like is formed on the Cu wiring layer 44,which is subjected to the surface treatment, by the plasma CVD method.At this time, since the compound layer 44 b is formed on the surfacelayer portion of the Cu wiring layer 44, the generation of Cuprojections from the surface layer portion of the Cu wiring layer 44 canbe suppressed. Accordingly, even if a film thickness of the Cu diffusionpreventing insulating film 46 is reduced, the Cu diffusion can beprevented.

[0059] Also, in the later step in which the annealing process isapplied, the compound layer 44 b formed on the surface layer portion ofthe Cu wiring layer 44 can suppress the generation of the projectionsfrom the surface layer portion of the Cu wiring layer 44.

[0060] In addition, the compound layer 44 b formed on the surface layerportion of the Cu wiring layer 44 can also function as the Cu diffusionpreventing film. Therefore, even if the insulating film whose dielectricconstant is low but whose Cu diffusion preventing capability is nothigh, e.g., the silicon-containing insulating film whose dielectricconstant is about 4, is employed as the Cu diffusion preventinginsulating film, the Cu diffusion can be prevented.

[0061] As a result, since the increase in the capacitance between the Cuwiring layers 44 can be prevented, the multi-layered wiring for thehigh-performance LSI having the small wiring delay can be manufactured.

[0062] (1) First Example

[0063] Then, a first example of the semiconductor device manufacturingmethod according to the first embodiment of the present invention willbe shown hereunder. First, the surface treatment of the Cu wiring layers44 on the semiconductor substrate 40 is carried out under two-stepconditions, described in the following, by using the above plasma CVDequipment 15.

[0064] (First Step)

[0065] NH₃ flow rate . . . 500 sccm

[0066] Pressure . . . 1 Torr

[0067] Temperature of the susceptor 16 (semiconductor substrate 40) . .. 375° C.

[0068] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0069] Process time . . . 10 second

[0070] In the first step, the natural oxide film formed on the surfacelayer portion of the Cu wiring layer 44 is removed.

[0071] (Second Step)

[0072] NH₃ flow rate . . . 500 sccm

[0073] Pressure . . . 1 Torr

[0074] Process time . . . 60 second

[0075] Then, the silicon-containing insulating film 46 (Cu diffusionpreventing insulating film) of 100 nm thickness is formed in the samechamber of the plasma CVD equipment 15 or another chamber underfollowing film forming conditions, as an example.

[0076] HMDSO flow rate . . . 50 sccm

[0077] N₂O flow rate . . . 100 sccm

[0078] NH₃ flow rate . . . 200 sccm

[0079] Pressure . . . 1 Torr

[0080] Power of the high-frequency power supply 20 of 380 kHz . . . 150W

[0081] (2) Second Example

[0082] Then, a second example of the semiconductor device manufacturingmethod according to the first embodiment will be shown hereunder. First,the surface treatment of the Cu wiring layers 44 on the semiconductorsubstrate 40 is carried out under two-step conditions, described in thefollowing, by using the above plasma CVD equipment 15.

[0083] (First Step)

[0084] The natural oxide film formed on the surface layer portion of theCu wiring layer 44 is removed by executing the process under the sameconditions as the first example.

[0085] (Second Step)

[0086] NH₃ flow rate . . . 200 sccm

[0087] CH₄ flow rate . . . 200 sccm

[0088] Pressure . . . 1 Torr

[0089] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0090] Process time . . . 30 second

[0091] Then, the silicon-containing insulating film 46 (Cu diffusionpreventing insulating film) of 100 nm thickness is formed by the samemethod as the first example.

[0092] (3) Third Example

[0093] Then, a third example of the semiconductor device manufacturingmethod according to the first embodiment will be shown hereunder. First,the surface treatment of the Cu wiring layers 44 on the semiconductorsubstrate 40 is carried out under two-step conditions, described in thefollowing, by using the above plasma CVD equipment 15.

[0094] (First Step)

[0095] The natural oxide film formed on the surface layer portion of theCu wiring layer 44 is removed by executing the process under the sameconditions as the first example.

[0096] (Second Step)

[0097] Ethylenediamine flow rate . . . 200 sccm

[0098] Pressure . . . 1 Torr

[0099] Process time . . . 60 second

[0100] Then, the silicon-containing insulating film 46 (Cu diffusionpreventing insulating film) of 100 nm thickness is formed by the samemethod as the first example.

[0101] (4) Fourth Example

[0102] Then, a fourth example of the semiconductor device manufacturingmethod according to the first embodiment will be shown hereunder. First,the surface treatment of the Cu wiring layers 44 on the semiconductorsubstrate 40 is carried out under two-step conditions, described in thefollowing, by using the above plasma CVD equipment 15.

[0103] (First Step)

[0104] The natural oxide film formed on the surface layer portion of theCu wiring layer 44 is removed by executing the process under the sameconditions as the first example.

[0105] (Second Step)

[0106] Ethylenediamine flow rate . . . 200 sccm

[0107] Pressure . . . 1 Torr

[0108] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0109] Process time . . . 30 second

[0110] Then, the silicon-containing insulating film 46 (Cu diffusionpreventing insulating film) of 100 nm thickness is formed by the samemethod as the first example.

[0111] (5) Fifth Example

[0112] Then, a fifth example of the semiconductor device manufacturingmethod according to the first embodiment will be shown hereunder. First,the surface treatment of the Cu wiring layers 44 on the semiconductorsubstrate 40 is carried out under two-step conditions, described in thefollowing, by using the above plasma CVD equipment 15.

[0113] (First Step)

[0114] The natural oxide film formed on the surface layer portion of theCu wiring layer 44 is removed by executing the process under the sameconditions as the first example.

[0115] (Second Step)

[0116] Ethylenediamine flow rate . . . 200 sccm

[0117] Pressure . . . 1 Torr

[0118] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0119] Process time . . . 30 second

[0120] Then, the silicon-containing insulating film 46 (Cu diffusionpreventing insulating film) of 100 nm thickness is formed by the samemethod as the first example.

[0121] (Post-process)

[0122] Then, as the post-process, the surface treatment of thesilicon-containing insulating film 46 (Cu diffusion preventinginsulating film) is carried out under following conditions.

[0123] Ethylenediamine flow rate . . . 200 sccm

[0124] Pressure . . . 1 Torr

[0125] Process time . . . 60 second

[0126] (6) Sixth Example

[0127] Then, a sixth example of the semiconductor device manufacturingmethod according to the first embodiment will be shown hereunder. First,the surface treatment of the Cu wiring layers 44 on the semiconductorsubstrate 40 is carried out under two-step conditions, described in thefollowing, by using the above plasma CVD equipment 15.

[0128] (First Step)

[0129] The natural oxide film formed on the surface layer portion of theCu wiring layer 44 is removed by executing the process under the sameconditions as the first example.

[0130] (Second Step)

[0131] Ethylenediamine flow rate . . . 200 sccm

[0132] Pressure . . . 1 Torr

[0133] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0134] Process time . . . 30 second

[0135] Then, the silicon-containing insulating film 46 (Cu diffusionpreventing insulating film) of 100 nm thickness, for example, is formedby the same method as the first example.

[0136] (Post-process)

[0137] Then, as the post-process, the surface treatment of thesilicon-containing insulating film 46 (Cu diffusion preventinginsulating film) is carried out under following conditions.

[0138] Ethylenediamine flow rate . . . 200 sccm

[0139] Pressure . . . 1 Torr

[0140] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0141] Process time . . . 60 second

[0142] Like the fifth example and the sixth example, if the surface ofthe silicon-containing insulating film 46 is exposed to the atmosphereor the plasma of the ethylenediamine gas after such silicon-containinginsulating film 46 is formed, the Cu diffusion can be prevented muchmore.

[0143] (Test Made by the Inventors of this Application)

[0144] The inventors of this application checked the effects of theabove semiconductor device manufacturing method according to the firstembodiment.

[0145] (1) Formation of the Reference Sample

[0146] First, in order to check the effects of the above semiconductordevice manufacturing method according to the present embodiment, thereference sample is formed. More particularly, while applying no processto the surface of the Cu wiring layer 44 on the semiconductor substrate40, the silicon-containing insulating film 46 (Cu diffusion preventinginsulating film) is formed on the Cu wiring layer 44. As thesilicon-containing insulating film 46, there is employed the film thathas the film characteristic, whose Cu-diffusion preventing capability islow such that the Cu in the Cu wiring layer 44 is readily diffused whenthis film is annealed at 450° C. for four hours, for example. As thefilm forming conditions, the conditions using the HMDSO only as the gasare employed, as described in the following, among the film formingconditions of the Cu diffusion preventing insulating film in the firstexample.

[0147] HMDSO flow rate . . . 50 sccm

[0148] Pressure . . . 1 Torr

[0149] Power of the high-frequency power supply 20 of 380 kHz . . . 150W

[0150] (2) Formation of the Test Sample

[0151] Then, the test sample is formed by the following method.

[0152] First, the natural oxide film on the surface layer portion isremoved by exposing the surface of the Cu wiring layer 44 on thesemiconductor substrate 40 to the NH₃ plasma while using the aboveplasma CVD equipment 15. Then, the surface treatment of the Cu wiringlayer 44 is carried out by the RF plasma (the pressure: 2.0 Torr) of themixed gas consisting of the NH₃ gas and C₇H₁₄ (methylcyclohexane). Then,the silicon-containing insulating film 46 is formed on the Cu wiringlayer 44 under the conditions identical to the film forming conditionsof the above reference sample.

[0153] (3) Test Method and Test Results

[0154] First, with regard to the reference sample and the test sample,the current (I)-voltage (V) characteristic of the silicon-containinginsulating film 46 (Cu diffusion preventing insulating film) was checkedby the Hg-probe method respectively. Then, after the reference sampleand the test sample were annealed at 450° C. for four hours, the current(I)-voltage (V) characteristic of the silicon-containing insulating film46 was checked once again by the Hg-probe method respectively.

[0155]FIG. 3 shows a current (I)-voltage (V) characteristic of thereference sample prior to the annealing, FIG. 4 shows a current(I)-voltage (V) characteristic of the reference sample after theannealing, FIG. 5 shows a current (I)-voltage (V) characteristic of thetest sample prior to the annealing, and FIG. 6 shows a current(I)-voltage (V) characteristic of the test sample after the annealing.An abscissa of these graphs denotes the electric field intensity (MV/cm)and an ordinate of them denotes the leakage current (A/cm²).

[0156] According to the I-V characteristic after the silicon-containinginsulating film 46 of the reference sample (prior to the annealing), asshown in FIG. 3, the film had a predetermined dielectric breakdownvoltage although such voltage is slightly varied according to locationsin the semiconductor substrate. Then, when the reference sample wasannealed at 450° C. for four hours, much leakage current was flownthrough the silicon-containing insulating film 46 at the low electricfield intensity according to the locations in the semiconductorsubstrate, as apparent from the comparison between FIG. 3 and FIG. 4.Thus, it was validated that there is such a tendency that the dielectricbreakdown voltage is lowered by the annealing.

[0157] In other words, this means that, if the predetermined process isnot applied to the surface of the Cu wiring layer 44 unlike the presentembodiment, the Cu in the Cu wiring layer 44 can be readily diffusedinto the Cu diffusion preventing insulating film 46 (silicon-containinginsulating film) whose Cu diffusion preventing capability was lowered bythe annealing.

[0158] In the test sample, the surface of the Cu wiring layer 44 wassubjected to the RF plasma process (13.56 MHz) by using the mixed gasconsisting of NH₃ gas+C₇H₁₄ (methylcyclohexane) gas. As apparent fromthe comparison between FIG. 5 and FIG. 6, no reduction in the dielectricbreakdown voltage of the silicon-containing insulating film 46 appearedeven if the annealing was applied. Thus, it was validated that suchdielectric breakdown voltage is equivalent to or more than that obtainedprior to the annealing.

[0159] As described above, it was checked that, if the surface treatmentof the Cu wiring layer 44 is carried out by using the semiconductordevice manufacturing method according to the present embodiment, thedielectric breakdown voltage of the silicon-containing insulating film46 (Cu diffusion preventing insulating film) on the Cu wiring layer 44after the annealing is equivalent or more than the voltage obtainedbefore the annealing based on the current (I)-voltage (V)characteristic, and thus the diffusion of Cu in the Cu wiring layer 44into the silicon-containing insulating film 46 can be prevented.

[0160] 2. Second Embodiment

[0161]FIGS. 7A and 7B are schematic sectional views showing asemiconductor device manufacturing method according to a secondembodiment of the present invention.

[0162] In the semiconductor device manufacturing method according to thesecond embodiment, since the natural oxide film formed on the surfacelayer portion of the Cu wiring layer is removed, then thesilicon-containing insulating film whose dielectric constant isrelatively low is formed on the Cu wiring layer, and then thepredetermined process is applied to this silicon-containing insulatingfilm, the film quality of the silicon-containing insulating film can bechanged into the Cu diffusion preventing insulating film, whose Cudiffusion preventing capability is high, to prevent the diffusion of Cu.

[0163] In the semiconductor device manufacturing method according to thesecond embodiment, first the semiconductor substrate 40 having the Cuwiring layer 44, as shown in FIG. 7A, like the first embodiment, isprepared.

[0164] Then, the semiconductor substrate 40 is carried into the chamber10 of the above plasma CVD equipment, and then the natural oxide filmformed on the surface layer portion of the Cu wiring layer 44 is removedby exposing the surface of the Cu wiring layer 44 on the semiconductorsubstrate 40 to the plasma of the NH₃ (ammonia) gas.

[0165] Then, as shown in FIG. 7B, a silicon-containing insulating film46 a is formed on the Cu wiring layer 44, from the surface of which thenatural oxide film is removed, in the same chamber 10 or another chamberof the same equipment. At this time, if the silicon-containinginsulating film 46 a is formed by using the reaction gas containingHMDSO, or the like, the film whose dielectric constant is about 3.5 to 4can be formed. In this case, this silicon-containing insulating film 46a is the insulating film whose Cu diffusion preventing capability is notso high. As the silicon-containing insulating film 46 a, the siliconnitride film, the silicon oxide film, the silicon oxide nitride film,etc. may be employed.

[0166] Then, the silicon-containing insulating film 46 a is exposed tothe atmosphere or the plasma of the mixed gas consisting of the NH₃(ammonia) gas and the C_(x)H_(y) (hydrocarbon) gas, the atmosphere orthe plasma of the mixed gas consisting of the N₂ (nitrogen) gas and theC_(x)H_(y) (hydrocarbon) gas, the plasma of the N₂ (nitrogen) gas, orthe atmosphere of the NH₃ (ammonia) gas in the same chamber 10 oranother chamber of the same equipment.

[0167] As the plasma of the mixed gas consisting of the NH₃ gas and theC_(x)H_(y) gas, the plasma of the mixed gas consisting of the N₂ gas andthe C_(x)H_(y) gas, and the plasma of the N₂ gas, it is preferable thatthe RF plasma of 13.56 MHz or the LF plasma of 380 kHz should beemployed.

[0168] In this step, the process may be carried out by two stepsdescribed in the following. More particularly, first thesilicon-containing insulating film 46 may be exposed to either theatmosphere or the plasma of the NH₃ gas or the plasma of the N₂ gas, andthen such film may be exposed to the atmosphere or the plasma of theC_(x)H_(y) gas. Otherwise, in the opposite sequence to the above twosteps, first the silicon-containing insulating film 46 may be exposed tothe atmosphere or the plasma of the C_(x)H_(y) gas, and then such filmmay be exposed to either the atmosphere or the plasma of the NH₃ gas orthe plasma of the N₂ gas.

[0169] In this case, the same gas as that explained in the firstembodiment can be employed as the C_(x)H_(y) gas.

[0170] In this manner, the film quality of the silicon-containinginsulating film 46 a is changed by processing the silicon-containinginsulating film 46 using the above gas, and thus this film 46 a canfunction as the Cu diffusion preventing insulating film for preventingthe diffusion of Cu. In other words, the silicon-containing insulatingfilm 46 a which has the low dielectric constant can be employed as theCu diffusion preventing insulating film that can prevent the diffusionof Cu. Accordingly, since the increase in the parasitic capacitancearound the Cu wiring of the multi-layered wiring, the multi-layeredwiring for the high-performance LSI having the small wiring delay can bemanufactured.

[0171] Also, since the natural oxide film on the surface layer portionof the Cu wiring layer 44 is removed by the plasma of the NH₃ gas andthen the silicon-containing insulating film 46 a is formed on the Cuwiring layer 44, the adhesiveness between the Cu wiring layer 44 and thesilicon-containing insulating film 46 a can be improved. Therefore, thereliability of the multi-layered wiring can be improved.

[0172] (1) First Example

[0173] A first example of the semiconductor device manufacturing methodaccording to the second embodiment will be shown hereunder. First, thesemiconductor substrate 40 is carried in the chamber 10 of the aboveplasma CVD equipment, and then the natural oxide film on the surfacelayer portion of the Cu wiring layer 44 is removed under the conditionsdescribed in the following.

[0174] NH₃ flow rate . . . 500 sccm

[0175] Pressure . . . 1 Torr

[0176] Temperature of the susceptor 16 (semiconductor substrate 40) . .. 375° C.

[0177] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0178] Process time . . . 10 second

[0179] In turn, the silicon-containing insulating film 46 a of 100 nmthickness, for example, is formed under following film formingconditions, as an example, in the same chamber 10 or another chamber.

[0180] HMDSO flow rate . . . 50 sccm

[0181] N₂O flow rate . . . 100 sccm

[0182] NH₃ flow rate . . . 200 sccm

[0183] Pressure . . . 1 Torr

[0184] Power of the high-frequency power supply 20 of 380 kHz . . . 150W

[0185] Subsequently, the silicon-containing insulating film 46 a isprocessed under following conditions.

[0186] NH₃ flow rate . . . 200 sccm

[0187] Pressure . . . 1 Torr

[0188] Power of the high-frequency power supply 26 of 13.56 MHz . . .not applied (0 W)

[0189] Process time . . . 60 second

[0190] (2) Second Example

[0191] Then, a second example of the semiconductor device manufacturingmethod according to the second embodiment will be shown hereunder.First, the natural oxide film on the surface layer portion of the Cuwiring layer 44 is removed by the same method as the first example.Then, the silicon-containing insulating film 46 a of 100 nm thickness isformed.

[0192] Then, this silicon-containing insulating film 46 a is processedunder following conditions.

[0193] NH₃ flow rate . . . 500 sccm

[0194] Pressure . . . 1 Torr

[0195] Power of the high-frequency power supply 20 of 380 kHz . . . 100W

[0196] Process time . . . 60 second

[0197] (3) Third Example

[0198] A third example of the semiconductor device manufacturing methodaccording to the second embodiment will be shown hereunder. First, thenatural oxide film on the surface layer portion of the Cu wiring layer44 is removed by the same method as the first example, and then thesilicon-containing insulating film 46 a is formed to have a thickness of100 nm.

[0199] Then, the silicon-containing insulating film 46 a is processedunder following conditions.

[0200] NH₃ flow rate . . . 200 sccm

[0201] CH₄ flow rate . . . 200 sccm

[0202] Pressure . . . 1 Torr

[0203] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0204] Process time . . . 60 second

[0205] (4) Fourth Example

[0206] A fourth example of the semiconductor device manufacturing methodaccording to the second embodiment will be shown hereunder. First, thenatural oxide film on the surface layer portion of the Cu wiring layer44 is removed by the same method as the first example, and then thesilicon-containing insulating film 46 a is formed to have a thickness of100 nm.

[0207] Then, the silicon-containing insulating film 46 a is processed bytwo steps described in the following.

[0208] (First Step)

[0209] NH₃ flow rate . . . 500 sccm

[0210] Pressure . . . 1 Torr

[0211] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0212] Process time . . . 30 second

[0213] (Second Step)

[0214] CH₄ flow rate . . . 500 sccm

[0215] Pressure . . . 1 Torr

[0216] Power of the high-frequency power supply 26 of 13.56 MHz . . .100 W

[0217] Process time . . . 30 second

[0218] (Test Made by the Inventors of this Application)

[0219] The inventors of this application formed test samples 1A, 2A onthe basis of the manufacturing method in the first example and thefourth example according to the second embodiment respectively, and thenchecked the current (I)-voltage (V) characteristic of thesilicon-containing insulating film 46 a by the same method as that inthe test of the first embodiment.

[0220]FIG. 8 shows a current (I)-voltage (V) characteristic of a testsample 1A prior to the annealing, FIG. 9 shows a current (I)-voltage (V)characteristic of the test sample 1A after the annealing, FIG. 10 showsa current (I)-voltage (V) characteristic of a test sample 2A prior tothe annealing, and FIG. 11 shows a current (I)-voltage (V)characteristic of the test sample 2A after the annealing.

[0221] According to the current (I)-voltage (V) characteristic of thesilicon-containing insulating film 46 a of the test sample 1A (thesilicon-containing insulating film 46 a is processed in the NH₃ gasatmosphere (pressure: 0.5 Torr)), as apparent from the comparisonbetween FIG. 8 and FIG. 9, the deterioration of the dielectric breakdownvoltage of the silicon-containing insulating film 46 a did not appeareven after the annealing was carried out. Thus, it was confirmed thatthe dielectric breakdown voltage is equivalent to or more than thatobtained prior to the annealing.

[0222] Also, in the current (I)-voltage (V) characteristic of thesilicon-containing insulating film 46 a of the test sample 2A (thesilicon-containing insulating film 46 a is processed by using the mixedgas consisting of the NH₃ gas and the CH₄ gas (pressure: 4 Torr)), asapparent from the comparison between FIG. 10 and FIG. 11, nodeterioration of the dielectric breakdown voltage of thesilicon-containing insulating film 46 a appeared even after theannealing was carried out. Thus, it was confirmed that the dielectricbreakdown voltage is equivalent to or more than that obtained prior tothe annealing.

[0223] These test results mean that the silicon-containing insulatingfilm 46 a can prevent the diffusion of Cu from the Cu wiring layer 44.In this manner, it was confirmed that, if the silicon-containinginsulating film 46 a is exposed to the NH₃ gas atmosphere or isprocessed by the plasma of the mixed gas consisting of the NH₃ gas andthe CH₄ gas by using the manufacturing method in the second embodiment,the silicon-containing insulating film 46 a can get the high Cudiffusion preventing function.

[0224] 3. Third Embodiment

[0225] In the above second embodiment, two-step process consisting ofthe ammonia process and the C_(x)H_(y) process is applied to thesilicon-containing insulating film 46 on the copper wiring layer 44. Asthe case may be, as shown in FIG. 12B, one-step process in which thesilicon-containing insulating film 46 on the copper wiring layer 44 isexposed to the atmosphere or the plasma of the hydrocarbon (C_(x)H_(y))gas may be carried out.

[0226] For instance, a carbon-containing layer 46 b of about 5 nmthickness is formed by executing the process under following conditions.

[0227] C₂H₂ flow rate . . . 50 sccm

[0228] Pressure . . . 0.5 Torr

[0229] Power of the high-frequency power supply 26 of 13.56 MHz . . . 0W

[0230] Power of the high-frequency power supply 20 of 380 kHz . . . 150W

[0231] Substrate temperature . . . 375° C.

[0232] This carbon-containing layer 46 b has the barrier propertyagainst the copper particle of the copper wiring layer 44 and has thesufficient etching resistance against the gaseous or liquid etchant forthe silicon-containing insulating film.

[0233] Accordingly, not only the barrier function against the copperparticles of the Cu wiring layer 44 but also the etching stopperfunction used when opening portions 48a are formed by etching the thickinterlayer insulating film 48 formed on the silicon-containinginsulating film 46, as shown in FIG. 12D, can be provided to thesilicon-containing insulating film 46 by the simple process.

[0234] In this case, as the hydrocarbon (C_(x)H_(y)) gas, the compoundset forth in the first embodiment may be employed in addition to C₂H₂.

[0235] Examples to which the process is applied will be explained withreference to FIGS. 12A to 12C and FIG. 12D and 13B hereunder.

[0236]FIGS. 12A to 12E are sectional views showing a semiconductordevice manufacturing method according to the third embodiment. Thesilicon-containing insulating film 46 serving as the barrier insulatingfilm is formed on the buried Cu wiring layer 44 in the same manner asthe second embodiment until the surface treatment in FIG. 7B is applied.This state is shown in FIG. 12A. Then, as shown in FIG. 12B, the surfacetreatment is carried out under the above conditions by using theatmosphere or the plasma of the hydrocarbon (C_(x)H_(y)) gas. Then, asshown in FIG. 12C, the interlayer insulating film 48 is formed. Then, asshown in FIG. 12D, the opening portions 48 a are formed by etching theinterlayer insulating film 48 while using the carbon-containing layer 46b as the etching stopper to expose the silicon-containing insulatingfilm 46. Then, as shown in FIG. 12E opening portions 48b are formed byetching the silicon-containing insulating film 46 via the openingportions 48 a to expose the wiring layer being made mainly of the copperfilm 44 at their bottom portions. Then, the upper wiring layer connectedto the wiring layer being made mainly of the copper film 44 via theopening portions 48 b, etc. are formed.

[0237] In the above, the compound layer 44 b shown in FIG. 2 is notformed on the surface layer of the copper film 44 before thesilicon-containing insulating film 46 is formed. But the compound layer44 b shown in FIG. 2 may be formed.

[0238] With the above, details of the present invention are explainedwith reference to the first to third embodiments. But the scope of thepresent invention is not limited to the examples that are particularlyshown in the above embodiments. The variation and the modification ofthe above embodiments within the range of gist that does not depart fromthe present invention should be contained in the scope of the presentinvention.

What is claimed is:
 1. A semiconductor device manufacturing methodcomprising the steps of: forming a silicon-containing insulating film ona wiring layer made mainly of a copper (Cu) formed over a semiconductorsubstrate; and exposing the silicon-containing insulating film anatmosphere or a plasma of a hydrocarbon (C_(x)H_(y)) gas.
 2. Asemiconductor device manufacturing method comprising the steps of:exposing a surface of a copper (Cu) wiring layer formed over asemiconductor substrate to a plasma of a gas selected from the groupconsisting of an ammonia gas, a mixed gas of nitrogen and hydrogen, aCF₄ gas, a C₂F₆ gas and a NF₃ gas; exposing the surface of the copper(Cu) wiring layer to an atmosphere or a plasma of a gas selected fromthe group consisting of an ammonia gas, an ethylenediamine gas, aβ-diketone gas, a mixed gas consisting of the ammonia gas and ahydrocarbon gas (C_(x)H_(y)), and a mixed gas consisting of a nitrogengas and the hydrocarbon gas (C_(x)H_(y)); and forming a Cu diffusionpreventing insulating film on the copper (Cu) wiring layer.
 3. Asemiconductor device manufacturing method comprising the steps of:exposing a surface of a copper (Cu) wiring layer formed over asemiconductor substrate to a plasma of an ammonia gas; forming asilicon-containing insulating film on the copper (Cu) wiring layer; andexposing the silicon-containing insulating film to an atmosphere or aplasma selected from the group consisting of an atmosphere or a plasmaof a mixed gas consisting of an ammonia gas and a hydrocarbon gas(C_(x)H_(y)), an atmosphere or a plasma of a mixed gas consisting of anitrogen gas and the hydrocarbon gas (C_(x)H_(y)), a plasma of thenitrogen gas, and an atmosphere of the ammonia gas.
 4. A semiconductordevice manufacturing method according to claim 2, wherein the plasma ofthe mixed gas consisting of the ammonia gas and the hydrocarbon gas(C_(x)H_(y)), the plasma of the mixed gas of the nitrogen gas and thehydrocarbon gas (C_(x)H_(y)), or the plasma of the nitrogen gas isanyone of an LF (Low Frequency) plasma and an RF (Radio Frequency)plasma.
 5. A semiconductor device manufacturing method comprising thesteps of: exposing a surface of a copper (Cu) wiring layer formed over asemiconductor substrate to a plasma of an ammonia gas; forming asilicon-containing insulating film on the copper (Cu) wiring layer; andexposing the silicon-containing insulating film to an atmosphere or aplasma of an ammonia gas or a plasma of a nitrogen gas, and thenexposing the silicon-containing insulating film to an atmosphere or aplasma of a hydrocarbon gas (C_(x)H_(y)).
 6. A semiconductor devicemanufacturing method comprising the steps of: exposing a surface of acopper (Cu) wiring layer formed over a semiconductor substrate to aplasma of an ammonia gas; forming a silicon-containing insulating filmon the copper (Cu) wiring layer; and exposing the silicon-containinginsulating film to an atmosphere or a plasma of a hydrocarbon gas(C_(x)H_(y)), and then exposing the silicon-containing insulating filmto an atmosphere or a plasma of an ammonia gas or a plasma of a nitrogengas.
 7. A semiconductor device manufacturing method according to claim2, wherein the hydrocarbon gas (C_(x)H_(y)) is selected from the groupconsisting of methane (CH₄), acetylene (C₂H₂), ethylene (C₂H₄), propane(C₃H₈), butylene (C₄H₈), butane (C₄H₁₀), benzene (C₆H₆), cyclohexane(C₆H₁₂), and methylcyclohexane (C₇H₁₄).
 8. A semiconductor devicemanufacturing method according to claim 3, wherein thesilicon-containing insulating film has a Cu diffusion preventingfunction by exposing the silicon-containing insulating film to theatmosphere or the plasma of the gas.